Wafer Sort

KEY FEATURE

Brand Model Name Date Rate
Chroma 3680 Advanced SOC Test System 150Mbps, up to 1Gbps (muxed)
Chroma 3650 SOC Test System 50/100Mbps; 200Mbps(MUX mode)
Chroma 3380 VLSI TEST SYSTEM 50/100Mbps

Model 3680 Advanced SoC Test System

  • 24 interchangeable slots for digital, analog and mixed-signal applications
  • 150 Mbps up to 1Gbps data rate (muxed)
  • Up to 512 sites parallel test
  • Up to 2048 digital I/O pins
  • 256 MW vector memory (512 MW option) (X2 mode)
  • Up to 64 CH PMU for high precision measurement
  • Per-pin timing measurement unit/PPMU/frequency measurement
  • Scan features to 8G depth/scan chain (16G option)
  • Edge placement accuracy (EPA) : ±150ps
  • Up to 128 CH High density DPS32
  • High density HDADDA2 mixed-signal option*
  • High density HDVI analog option*
  • Efficient high power HCDPS analog option*
  • High performance HDAVO option*
  • Microsoft Windows® 10 OS
  • C#.NET and GUI programming interface
  • CRISPro, full suite of intuitive software tools
  • Test program and pattern converters for other platforms
  • Accept DIB and probe card of other testers directly
  • Support STDF data output and customized data format
  • Air-cooled, small footprint tester-in-a-test-head design

Model 3650 SoC Test System

  • 50 /100 MHz
  • 512 digital I/O pins
  • 16/32 MW vector memory
  • 16/32 MW pattern instruction memory
  • Multi-site testing up to 32 sites
  • Per-pin test architecture
  • Up to 8 16-bit ADDA channels option
  • Up to 2Gbit X 8 CH scan depth option
  • ALPG option for memory test
  • Up to 32 high-voltage pins
  • 32 high-performance DPS channels
  • Overall timing accuracy < ±550ps
  • 8 ~ 32-CH / board for VI-45 analog option
  • 2 ~ 8-CH / board for PVI-100 analog option
  • MicrosoftWindows® XP OS
  • C++ and GUI programming interface
  • CRISP full suite of intuitive software tools
  • Test template for test program creation
  • Test program and pattern converters for other platforms
  • Accept DIB and probe card of other testers directly
  • Support STDF data output
  • Air-cooled, small footprint tester-in-a-test-head design

Model 3380 VLSI Test System

  • 50/100 MHz clock rate
  • 50/100 Mbps data rate
  • 1024 I/O pins (max. 1280 I/O pins)
  • Up to 1024 sites parallel testing
  • 32/64/128 pattern memory
  • 16M capture memory per pin
  • Various VI source
  • Flexible hardware architecture (interchangeable I/O, VI, ADDA,)
  • Real parallel trim/match function
  • Time and frequency measurement unit (TFMU)
  • STDF tools support
  • Test program/pattern converter (J750, D10, S50/100, E320, SC312, V7, TRI-6036, etc.)
  • AD/DA test (option)
  • SCAN test option (max. 2G M/chain)
  • ALPG test option for embedded memory
  • CRAFT C/C++ programming language
  • Software interface same as 3380P/3360P
  • User-friendly Windows 7 environment

CORE TEST SERVICES

Testar provides Semiconductor Testing Service in Wafer Probing and Final Testing.

Our testing service covers a wide range of applications, such as logic devices, MCU, Interface controller IC, sensor controller, A/D and D/A converter,... etc. Which are mainly used in consumer electronics and communication devices.

Testar is capable to handle 5, 6, 8 and 12" wafers with inkless or off-line ink process inside our class-1K environment. Our Final Testing Service performs electrical testing as well as customized test items, program and parameters. The pick-and-place handler could cover diversified package type of devices.

Testar Semiconductor Tesing also provides below Engineering services to make your device fast "Time to Market",
  • Test program development 
  • Test program conversion 
  • Test Time reduction 
  • DFT consultant 
  • Multi-Site Testing development 

 +886-3-327-9600

testarservice@testar.com.tw

68,Hwa-Ya 1st Rd.,

Hwa-Ya Technology Park,

Taoyuan Hsien 333, Taiwan

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